1. Field of the Invention
The present invention relates to semiconductor devices and manufacturing methods thereof, and more particularly to a semiconductor device provided with a bipolar transistor and a resistance element and a manufacturing method thereof.
2. Description of the Background Art
A conventional method of manufacturing a semiconductor device provided with a bipolar transistor is explained. As shown in FIG. 19, a semiconductor substrate 101 has an element forming region A partitioned by a field oxide film 103, in which an external base extracting electrode 104 is formed.
A dopant impurity for formation of an external base diffusion layer is implanted from above external base extracting electrode 104. Thereafter, a silicon oxide film 105 is formed. Silicon oxide film 105 is subjected to etching, so that an opening for formation of a base region is formed. During the etching, the surface of semiconductor substrate 101 is etched to a certain extent.
A heat treatment is conducted to cause the impurity implanted in external base extracting electrode 104 to diffuse into semiconductor substrate 101, so that an external base diffusion layer 107 is formed. At this time, a relatively thin silicon oxide film 108 is formed on the exposed surface of semiconductor substrate 101 and others.
Next, a dopant impurity for formation of an intrinsic base diffusion layer is implanted. A silicon oxide film is formed to cover the opening, which is subjected to anisotropic etching, so that a sidewall oxide film 109 is formed. At this time, in a peripheral region B, silicon oxide film 105 has been formed on field oxide film 103.
Next, as shown in FIG. 20, a polysilicon film (or, amorphous silicon film) 110 is formed on silicon oxide film 105. Arsenic is implanted into polysilicon film 110. Next, as shown in FIG. 21, prescribed etching is conducted to form an emitter extracting electrode 110a in element forming region A and to form a resistance element 110b in peripheral region B. Thereafter, an interlayer silicon oxide film 111 is formed to cover emitter extracting electrode 110a and resistance element 110b. 
A further heat treatment is conducted. The prescribed impurity having been implanted is diffused, so that an intrinsic base diffusion layer 112 is formed. At the same time, the arsenic having been implanted into emitter extracting electrode 110a is diffused into semiconductor substrate 101, so that an emitter diffusion layer 113 is formed. In addition, resistance element 110b is activated.
Next, as shown in FIG. 22, interlayer silicon oxide film 111 is subjected to etching, so that contact holes 111a-111e are formed. Next, as shown in FIG. 23, a collector electrode 117, an emitter electrode 116 and a base electrode 115 are formed in contact holes 111a-111c, respectively, in element forming region A. In peripheral region B, an electrode 118 connected to resistance element 110b is formed in each contact hole 111d, 111e. The semiconductor device having a bipolar transistor is thus formed.
As described above, with the conventional method of manufacturing the semiconductor device provided with a bipolar transistor, emitter extracting electrode 110a and resistance element 110b are formed from the same polysilicon film 110. This polysilicon film 110 includes an aggregation of a large number of crystals, and each crystal is called a grain.
The impurity, such as arsenic, implanted into polysilicon film 110 is more likely to diffuse along the grain boundaries between the grains.
In recent years, with advancement of miniaturization of semiconductor devices, an exposed region of semiconductor substrate 101 for formation of emitter diffusion layer 113 has been reduced, as shown in FIG. 24, with fewer grains located in the exposed region. The fewer grains located therein means fewer grain boundaries located in or in contact with the relevant region.
Further, along with the miniaturization, the temperature for heat treatment has been lowered, or the time for the heat treatment has been reduced, making diffusion of the impurity less intense.
Consequently, the impurity implanted into polysilicon film 110 for formation of the emitter diffusion layer cannot diffuse sufficiently to a predetermined depth from the exposed surface of semiconductor substrate 101, resulting in an undesirably shallow emitter diffusion layer 113.
Such a shallow emitter diffusion layer 113 degrades electrical characteristics, thereby causing increased leakage of base current, reduction of current gain hFE, decreased breakdown voltage between emitter and base, and other problems.
On the other hand, in resistance element 110b, as shown in FIG. 25, variation in grain size would cause variation in resistance value, thereby degrading precision in resistance value of resistance element 110b. 
The present invention has been made to solve the above problems. An object of the present invention is to provide a semiconductor device suffering less degradation of the above-described electric characteristics and less variation in resistance value of the resistance element. Another object of the present invention is to provide a manufacturing method of such a semiconductor device.
The semiconductor device according to an aspect of the present invention includes a first impurity region of a first conductivity type, a second impurity region of a second conductivity type, an insulating film, an opening, and a conductive portion. The first impurity region of the first conductivity type is formed in a main surface of a semiconductor substrate. The second impurity region of the second conductivity type is formed in a surface of the first impurity region to be surrounded by the first impurity region from below and from all sides. The insulating film is formed on the semiconductor substrate to cover the first impurity region and the second impurity region. The opening is formed in the insulating film to expose a surface of the second impurity region. The conductive portion is formed on the insulating film and fills the opening, and is electrically connected to the second impurity region. The conductive portion is formed of a polycrystal film. A portion of the polycrystal film located at a bottom of the opening and contacting the surface of the second impurity region has a grain size that is smaller than a grain size of a portion of the polycrystal film located on an upper surface of the insulating film.
With such a structure, when the second impurity region is formed in the first impurity region in the main surface of the semiconductor substrate by prescribed impurity introduced into the conductive portion, the impurity diffuses from the grain boundaries of the polycrystal film forming the conductive portion through the surface of the first impurity region. At this time, as the grain size of the polycrystal film in the portion located at the bottom of the opening is smaller than the grain size of the portion located on the upper surface of the insulating film, a larger number of grain boundaries come into contact with the surface of the first impurity region. Accordingly, the impurity diffuses through the surface of the first impurity region sufficiently down to a prescribed depth in the first impurity region, so that the second impurity region of a desired depth is formed. As a result, degradation of electrical characteristics including leakage current and breakdown voltage is suppressed. Herein, the grain size is defined as a reciprocal of the number of grains per unit length, as will be described later.
The opening is formed to have a prescribed width and a depth greater than the prescribed width, and the grain size in the portion contacting the surface of the second impurity region is preferably smaller than the prescribed width.
Thus, there are a larger number of grain boundaries at the bottom of the opening, and the impurity sufficiently diffuses from the polycrystal film into the semiconductor substrate region. This ensures that the second impurity region of a desired depth is formed.
The semiconductor device preferably includes a resistance element formed on the insulating film from the same layer as the conductive portion, and the resistance element has one grain in a film thickness direction.
Thus, the grain size of the polycrystal film forming the resistance element becomes relatively large, so that variation in resistance value is decreased.
Further, the semiconductor device preferably includes a third impurity region of the second conductivity type formed in the main surface of the semiconductor substrate to surround the first impurity region from below and from all sides thereof.
In this case, a bipolar transistor having the first impurity region as a base, the second impurity region as an emitter and the third impurity region as a collector is formed. In particular, since the second impurity region forming the emitter has a desired depth, degradation of electrical characteristics in the bipolar transistor, including leakage of base current, reduction of current gain hFE and a decrease of breakdown voltage between emitter and base, is suppressed.
The first one of the manufacturing methods of a semiconductor device according to another aspect of the present invention includes the following steps. A first impurity region of a first conductivity type is formed on a semiconductor substrate. An insulating film is formed on the semiconductor substrate. An opening is formed in the insulating film to expose a surface of the first impurity region. Crystal defect are produced in the exposed surface of the first impurity region by applying damage thereto. A polycrystal film is formed on the insulating film and on the exposed surface of the first impurity region. Prescribed impurity of a second conductivity type is introduced into the polycrystal film. The prescribed impurity introduced into the polycrystal film is caused to diffuse from the surface of the first impurity region to an inside thereof to form a second impurity region of the second conductivity type. A conductive portion electrically connected to the second impurity region is formed by processing the polycrystal film.
According to this manufacturing method, an increased number of crystal defects are produced in the exposed surface of the first impurity region (semiconductor substrate). Accordingly, even if the polycrystal film is deposited under the conditions causing the grain size to increase, a portion of the polycrystal film formed in the vicinity of the exposed surface of the first impurity region has a relatively small grain size influenced by the crystal defects produced in the surface of the first impurity region, and thus, an increased number of grain boundaries come into contact with the surface of the first impurity region. As such, the prescribed impurity diffuses from the grain boundaries through the surface of the first impurity region sufficiently down to a prescribed depth in the first impurity region, so that the second impurity region of a desired depth is formed. As a result, degradation of electrical characteristics including leakage current and breakdown voltage otherwise caused by a shallow second impurity region can be suppressed.
The second one of the manufacturing methods of a semiconductor device according to the another aspect of the present invention includes the following steps. A first impurity region of a first conductivity type is formed on a semiconductor substrate. An insulating film is formed on the semiconductor substrate. An opening is formed in the insulating film to expose a surface of the first impurity region. A polycrystal film is formed to cover the insulating film and to fill the opening. Prescribed impurity of a second conductivity type is introduced into the polycrystal film. Promoting impurity for promoting growth of grains is introduced into the polycrystal film from above the polycrystal film. The grains of the polycrystal film are caused to grow. The prescribed impurity introduced into the polycrystal film is caused to diffuse from the surface of the first impurity region to an inside thereof to form a second impurity region of the second conductivity type. A conductive portion electrically connected to the second impurity region is formed by processing the polycrystal film.
According to this manufacturing method, at the time when the promoting impurity for promoting growth of the grains of the polycrystal film is being introduced, it is introduced relatively easily into the portion of the polycrystal film located on the insulating film, while it is hardly introduced into the portion located inside the opening and contacting the surface of the first impurity region. Accordingly, even if the polycrystal film is being formed under the conditions making the grain size relatively small, the grains in the portion of the polycrystal film located on the insulating film grow and become large. By comparison, the grains in the portion contacting the surface of the first impurity region hardly grow, and thus, a large number of grain boundaries come into contact with the surface of the first impurity region. As such, the prescribed impurity diffuses from the grain boundaries through the surface of the first impurity region sufficiently down to a prescribed depth in the first impurity region, so that the second impurity region is formed with a desired depth. As a result, degradation of electrical characteristics including leakage current and breakdown voltage otherwise caused by a shallow second impurity region can be suppressed.
Specifically, in the step of introducing the promoting impurity into the polycrystal film, a transition metal is preferably implanted as the promoting impurity.
Thus, it is readily possible to promote the growth of the grains of the polycrystal film by simply applying a heat treatment thereto.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.